实习期1年左右。
具体职位要求如下：
1.微波通信产品线
Position Title: Digital HW Engineer (Intern)
Job Description
1. Get involved in complete HW design cycle, from concept to volume with adherence to development process
2. Contribute the detail design spec in solution definition, key component identification, document preparation, etc.
3. Implement the design spec with high quality HW schematic design
4. Follow the layout definition and make sure all electrical constrains are taken into account.
5. Develop qualification plan and carry out the HW qualification
6. Responsible for delivering full-set documentation for manufacturing
7. Support industrialization engineer to carry out industrial qualification
8. Support maintenance activities of developed product if necessary, including second source qualification, investigation of manufacturing and field issue, etc.
Requirements
1. Education background:
- Master
- Major in Communication Engineering/Electronic Engineering or related
- Good background knowledge in telecommunication
2. Computer skill:
- Skilled in normal computer operation
- Skills in Mentor Graphic are preferred
3. Language ability: CET 6, Excellent English written and verbal communication skill
4. Other requirements:
- Hardworking
- Open-minded, good team work spirit
-Self motivated, ability to work independently with minimal supervision
-Strong learning desire, good self-study ability
2.微波通信产品线
Position Title: FPGA Engineer (Intern)
Job Description
1. Get involved in complete FPGA design cycle, with adherence to development process
2. Participate in chip level definition, capable to understand chip/system requirements and derive associated technical requirements at module/chip level
3. Responsible for the detail design spec in chip/module definition of FPGA.
4. Responsible for module design with VHDL, function verification, physical implementation and FPGA design qualification on board
5. Create test plan from module level to chip level, Write test bench for functional verification
6. Debug/test the chip design in board/system and Create test report.
7. Cooperate with and Support HW/SW engineers for board/system development. Support I&V Engineers for system integration test
Requirements
1. Education background: Master, major in Communication Engineering/Electronics Engineering or related, good background knowledge in telecommunication would be a plus
2. Experience on VHDL /test instruments for communication and electronics /telecommunication development/ Matlab simulation is preferred
3. Computer skill:
- Skilled in normal computer operation
- Skills in the following tools are preferred: Modelsim, Synplify , Precision, Mentor HDL Designer
4. Language ability: CET 6, Excellent English written and verbal communication skill
5. Other requirements:
- Hardworking
- Open-minded, good team work spirit
-Self motivated, ability to work independently with minimal supervision
-Strong learning desire, good self-study ability
2.光传输WDM产品线
Position Title: SW Development Engineer (Intern)
Job Description
1. Network Element software detailed design in time for the new release;
2. Coding, debugging, unit test and bug fixing in time;
3. Responsible for the quality of the design, coding, unit test according to the criteria defined
Requirements
1. Telecommunications or computer science or related major
2. Familiar with the C/C++ language, better with experience in embedded programming.
3. Knowledge of OOAD and software engineering.
4. Good command of English language - written, spoken and reading
5. Good communication skills, team spirit and adaptability
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备注
1 Pls send your resume(English and Chinese) to lanyi.wang@alcatel-lucent.com <mailto:Recruit.Accs@alcatel-lucent.com> with the subject SW/HW/FPGA Intern+name(Better forward by you or teacher in UESTC)
2 Expected intern period: about 1 year or more, from Oct. 2008 to Oct. 2009
3 Any intern in our company must get the signed approval of your teacher, and your time available for work in our company should better be no less than 4 days/week
4 Salary standard for intern in our company
Master (in RMB):110 per work day
5 Considering time problem, Master students who will be graduate in 2010 are welcome
